Post Name Physical Design Engineer Date August 05, 2023 Short Info. Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure.
Google Recruitment 2023 Overview
| Company Name | |
| Post Name | Physical Design Engineer |
| Job Type | Full Time Job |
| Experience | 0 to 2 years |
| Function/Business Area | Information technology Consulting Outsourcing |
| Location | Bangalore |
| Category | sales |
| Official Website | |
| Salary | UPTo 3.5LPA + Incentives |
About Google Company
Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
Why You Should Join
With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.
Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.
- Develop all aspects of ASIC RTL2GDS implementation for high PPA designs.
- Manage block and full-chip level physical implementation and QoR (e.g., power, timing, area).
Education Requirement
- Bachelor’s degree in Electrical Engineering or equivalent practical experience.
- 2 years of experience in physical design implementation.
- Experience in one or more synthesis/PnR tools (e.g., Genus, Innovus, DC, ICC).
- Experience in high performance synthesis, PnR and sign-off optimizations, sign-off convergence, including Static Timing Analysis (STA), electrical checks, and physical verification.
Skills and Requirements
- Knowledge of STA and sign-off convergence methodology.
- Knowledge of industry standard implementation tools.
- Fundamentals of computer architecture and Knowledge of Verilog/SystemVerilog.
- Understanding of Circuit design, device physics, and deep submicron technology.
- Excellent scripting skills in scripting languages (e.g., Python, Tcl, and/or Perl).